1996 IEEE Workshop on VLSI Signal Processing

Program at a Glance

Time Wednesday Thursday Friday
9:00 Keynote 1: Prof. B. Girod Keynote 2: B.M. Leiner Keynote 4: P. Shah
9:45 Application-specific processors Design Synthesis Architectures for video coding
11:00 Video processors Communication Circuits Low-power design for wireless communications
12:30 Lunch Lunch Lunch
2:00 Computer-aided design Keynote 3: P.P. Carvey
Low-power and wireless architectures Architectures for video coding
DSP implementations Dining Cruise
8:00 Panel

All meetings will be held at the Sakura-A meeting room. Lunch will be served at the Kyoto room. Registration will be open in front of the Sakura rooms; Tuesday: from 5:00 - 8:00 pm and during the regular hours of the workshop.


Last Update: 8/1/96

K. Konstantinides